The system clock source (FOSC) may be selected from one of 5 sources:
- Primary Oscillator (POSC) on the OSC1 and OSC2 pins
- Internal Phase-Locked Loop (PLL)
- Internal Fast RC Oscillator (FRC)
- Internal Low-Power RC Oscillator (LPRC)
- Secondary Oscillator (SOSC) on the SOSCI and SOSCO pins
This clock is then divided by 2 to produce the internal peripheral clock (FP) and core CPU instruction cycle clock, FCY as shown:
FCY may optionally be further divided down using DOZE mode settings, which enables power savings while continuing to run the peripherals at FOSC / 2.