Developer Help

The FRC Oscillator is a fast (7.37 or 8 MHz nominal), user-trimmable, internal-RC oscillator. The output can drive the PLL or be divided using the programmable RCDIV bits.

Some devices contain an additional 500kHz Low-Power FRC (LPFRC) oscillator which enables lower-power consumption as compared with standard FRC oscillator.

The CLKDIV register RCDIV bits configure a selectable output divider that allows the choice of a lower clock frequency from seven different options plus, the direct FRC/LPFRC frequency output.

The FRC Oscillator Tuning register, OSCTUN, allows the user to fine tune the FRC/LPFRC Oscillator over a range of approximately ±12% (typical). Each bit increment or decrement changes the factory calibrated frequency of the FRC/LPFRC Oscillator by a fixed amount.

Code Example:

The following MPLAB^® XC16 compiler code example enables FRCDIV as the default system clock source and sets the RCDIV divider bits to divide-by-16 at run-time for a PIC24FJ128GA010 MCU:

#include <xc.h>

#pragma config FNOSC FRCDIV    // Enable FRCDIV as system clock source
                    // default RCDIV setting sets FRC @ 4 MHz providing 4 MHz sys clk (2 MIPs)

int main(void)
{
    CLKDIVbits.RCDIV = 4;        // enable divide-by-16 setting
                        // sets FRC @ 0.5 MHz providing 0.5 MHz sys clk (0.25 MIPs)

    while(1);
}