16-Bit Oscillator System: Fail-Safe Clock Monitor

The Fail-Safe Clock Monitor (FSCM) monitors the Primary Oscillator (POSC) to ensure it is functional. If the POSC stops working, it will automatically switch the clock source to the internal Fast RC Oscillator (FRC). The switch to the FRC allows continued device operation.

The FSCM function is enabled by programming the FCKSM (Clock Switch and Monitor) bits in the Configuration settings.

The FSCM will generate a clock failure trap and will switch the system clock to the FRC oscillator. You then have the option to either attempt to restart the oscillator or execute a controlled shutdown.

The following MPLAB® XC16 configuration macro enables FSCM for a PIC24FJ128GA010 MCU:

#pragma config FCKSM = CSECME      // clock switching enabled and fail-safe clock monitor enabled

For more information about the oscillator failure trap, refer to "Section 8. Interrupts" in the “PIC24F Family Reference Manual”.

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