Cortex®-M0+ Debug Acess Port (DAP)

The ARM® Cortex®-M0+ Debug Acess Port (DAP) enables communication between the core and the device pins during debug.

The Debug Access Port enables the following:

  • Halting, resuming, and single stepping of program execution
  • Access to processor core registers and special registers
  • On-the-fly memory access
  • Data watchpoints
  • HW/SW breakpoints
  • PC sampling for basic profiling
Click image to enlarge.

The Data Watchpoint Unit (DWT) is a debug unit that provides up to 2 watchpoints for data tracing and system profiling (CPU statistics, PC sampler).

The Breakpoint Unit (BPU) allows up to 4 Hardware breakpoints to generate debug events

The Micro Trace Buffer (MTB) provides a simple instruction trace. It uses a small portion of SRAM for the trace buffer.

The Serial Wire Debug (SWD) port consists of 3 pins.


Unlike the other SAM micros, the SAM D, SAM L, and SAM C micros (Cortex-M0+ based) do not implement the JTAG interface. It is SWD only.

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