ARM Cortex-M0+ Sleep Modes

The ARM® Cortex®-M0+ core has three sleep modes to reduce power consumption.

  • Normal sleep
  • Deep sleep (Wake up Interrupt Controller - WIC)
    • The Wake up Interrupt Controller (WIC) allows an interrupt to be detected even though the clock to the core is disabled.
  • Deep sleep with State Retention Power Gating support (WIC + SRPG)
    • State Retention Power Gating (SRPG) allows power to be removed from some parts of the core. This helps to reduce the power consumed by transistor leakage.

Power consumption draw for each mode:

  • Active mode: Leakage + dynamics
  • Sleep mode: Leakage + some dynamics
  • Deep sleep: Leakage
  • Deep Sleep with SRPG: State retention only

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