Cortex® M0+ Watch Dog Timer (WDT) Overview

The Watch Dog Timer (WDT) allows a Cortex®-M0+ based microcontroller to recover from catastrophic software errors such as a run-away code or a deadlock condition. Once enabled, the WDT requires the application software to write a bit pattern to a WDT register within an allocated time period. If the WDT CLEAR register is not updated by the application within the allotted time, a system reset signal is generated.

cm0plus-wdt-general.png

WDT Features

  • Reset occurs when the WDT is not reset within a certain time period.
  • WDT operates on a clock source which is independent of the CPU. GCLK-WDT can be as low a 32 Khz.
  • The timeout period can be up to 32,000 clock cycles (one second using 32 kHz clock source).
  • WDT Can be programmed to initiate an early warning interrupt to alert the application of an imminent WDT overflow.
  • The "Always On" feature allows the WDT to operate while the device is in sleep mode. If a WDT reset occurs during sleep mode, the MCU wakes up and resumes operation at the next instruction
  • The WDT has two modes of operation:
    • Normal Mode - This mode requires the WDT to be reset anytime before the timeout period expires.
    • Window Mode - This mode requires the WDT be reset within a specific time window. Both minimum and maximum reset periods are defined in the window mode.

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WDT Configuration
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WDT Example Project
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