32 kHz Oscillators Controller (OSC32KCTRL)
Overview
The 32 kHz Oscillators Controller (OSC32KCTRL) provides a user interface to the 32.768 kHz oscillators: XOSC32K and OSCULP32K.
The OSC32KCTRL sub-peripherals can be enabled, disabled, calibrated, and monitored through interface registers.
All sub-peripheral statuses are collected in the Status (STATUS) register. They can additionally trigger interrupts upon status changes via the INTENSET, INTENCLR, and INTFLAG registers.
Features
- 32.768 kHz Crystal Oscillator (XOSC32K)
- Programmable start-up time
- Crystal or external input clock on XIN32 I/O
- Clock failure detection with safe clock switch
- Clock failure event output
- 32.768 kHz Ultra-low Power Internal Oscillator (OSCULP32K)
- Ultra-low power, always-on oscillator
- Frequency fine-tuning
- Calibration value loaded from Flash factory calibration at reset
- 1.024 kHz clock outputs available
OSC32KCTRL Block Diagram
The OSC32KCTRL will continue to operate in any Sleep mode where a 32 kHz oscillator is running as the source clock. The OSC32KCTRL interrupts can be used to wake up the device from Sleep modes. The OSC32KCTRL bus clock (CLK_OSC32KCTRL_APB) can be enabled and disabled in the Main Clock (MCLK) module.
The interrupt request lines are connected to the interrupt controller. Using the OSC32KCTRL interrupts requires the interrupt controller to be configured first.
The external 32.768 kHz crystal must be connected between the XIN32 and XOUT32 pins, along with any required load capacitors. For details on recommended oscillator characteristics and capacitor load, refer to the "Electrical Characteristics" section of the product data sheet.
Principle of Operation
XOSC32K and OSCULP32K are configured via OSC32KCTRL control registers. Through this interface, the sub-peripherals are enabled, disabled, or have their calibration values updated. The STATUS register gathers different status signals coming from the sub-peripherals of OSC32KCTRL. The status signals can be used to generate system interrupts, and in some cases wake up the system from Standby mode, provided the corresponding interrupt is enabled.