Generic Clock Controller (GCLK)
Overview
Depending on the application, peripherals may require specific clock frequencies to operate correctly. The Generic Clock Controller (GCLK) features five Generic Clock Generators (0…4) that can provide a wide range of clock frequencies. Generators can be set to use different external and internal oscillators as a source. The clock output frequency of each generator can be divided. The outputs from the generators are used as sources for the Peripheral Channels, which provide the Generic Clock (GCLK_PERIPH) to the peripheral modules. The number of Peripheral Clock Channels is dependent on the number of peripherals in the device.
Block Diagram
Clock Generator 0 is always the direct source of the GCLK_MAIN clock signal, which is fed to the CPU and synchronous bus via the Main Clock Controller.
Refer to the "GCLK - Generic Clock Controller" chapter from the product data sheet for more details.