Addressing Modes

Memory Loads/Stores

For loading and storing to memory, MIPS32® Central Processing Units (CPUs) implement only one addressing mode: Base Address Plus Displacement

For example, any load or store machine instruction can be written:

​

You can use any of the CPU GPRs for the destination and source. The offset is a signed, 16-bit number (-32768 to +32767). In this example, the program address used for the load is the sum of $2 and the offset.

This addressing mode is sufficient to pick out a particular member of a C structure, or of a particular array element. It is also enough to provide a reasonable-sized global area around the gp value for access to static and extern variables.

Other, more complex memory addressing modes are implemented by the assembler as a sequence of instructions.

Register Loads/Stores

For register loading/storing, MIPS32® ALU instructions implement Register-Direct Addressing whereby the register numbers are encoded directly in the instruction.

Many ALU operations are 3-operand, with the result register and operands shown in the same order you'd use to write the operation in C or any other algebraic language, so:

​

means exactly:

$1 = $2 - $3

  Return to Top

© 2024 Microchip Technology, Inc.
Notice: ARM and Cortex are the registered trademarks of ARM Limited in the EU and other countries.
Information contained on this site regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.