The PIC32 family of devices has multiple internal clocks that are derived from internal or external clock sources. Some of these clock sources have Phase-Locked Loops (PLLs), a programmable output divider, and/or an input divider, to scale the input frequency to suit the application.
Clock sources can be changed on-the-fly by software. Registers controlling these clocks are locked by hardware to protect against erroneous clock switching. They must be unlocked by a series of writes before software can perform a clock switch.
A Fail-Safe Clock Monitor (FSCM) detects clock failure and permits safe application recovery or shutdown by using one of the on-chip fast RC oscillators.
Some clock configurations are controlled by user defined default settings and some must be determined at run-time.
This block diagram shows a superset of features. For more detail on the oscillators for a specific PIC32 family click on the links below:
PIC32 Oscillator Configuration Spreadsheet
Download a Microsoft Excel file which simulates the PIC32 oscillator configuration settings. Most configuration options are provided for you. It will also keep you out of trouble by highlighting incompatible configurations. Note the tabs at the bottom select PIC32MX or PIC32MZ configurations.
For more detail on the Oscillator module for a specific PIC32 device, please view the family reference manual chapter for that device, for example:
- Section 6. Oscillators (PIC32MX795F512L)
- Section 42. Oscillators with Enhanced PLL (PIC32MZ2048EFG100)
The device data sheet should then be consulted to verify the specific features implemented in that device.