Half-Bridge mode is an option for Enhanced PWM. In Half-Bridge mode, two ECCP pins are used as outputs to drive push-pull loads. The Enhanced PWM output signal is output on two I/O pins: the PxA pin and the PxB pin. The PxA pin will output one PWM signal while the complementary PWM output signal is output on the PxB pin. The Enhanced PWM will handle the timing of the two alternating PWM signals to drive an H-Bridge arrangement or Full-Bridge, where four power switches are being modulated with two PWM signals.
In Half-Bridge mode, the Enhanced PWM dead-band delay can be used to prevent shoot-through or direct short circuit paths of current in Half-Bridge arrangements.
The PxA and PxB outputs are multiplexed standard digital I/O pins and need to be setup as outputs to drive the PWM signal. This is down by clearing the associated bit in the TRIS register.