Timer2 Interrupt

Timer2 can generate an interrupt when the TMR2 and PR2 registers match. That match signal can also feed a postscaler to delay the number of matches required to initiate a Timer2 interrupt. The output of the postscaler sets the Timer2 Interrupt Flag bit (TMR2IF) of the Peripheral Interrupt (PIR1) register. The interrupt is enabled by setting the TMR2 Match Interrupt Enable bit (TMR2IE) of the Peripheral Interrupt Enable (PIE1) register.



0000 = 1:1

0001 = 1:2

0010 = 1:3

1111 = 1:16

The postscaler has a range of 1:1 through 1:16 and is selected by the Timer Output Postscaler Select bits (T2OUTPS) of the Timer2 Control register (T2CON).

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