ADC Offset Error

Analog-to-Digital Converter (ADC) offset error is defined as the deviation of the actual ADC’s transfer function from the perfect ADC’s transfer function at the point of zero to the transition measured in the LSB bit. When the transition from output value 0 to 1 does not occur at an input value of 0.5 LSB, then we say that there is an offset error. With positive offset errors, the output value is larger than 0 when the input voltage is less than 0.5 LSB from below. With negative offset errors, the input value is larger than 0.5 LSB when the first output value transition occurs. In other words, if the actual transfer function lies below the ideal line, there is a negative offset and vice versa. Positive and negative offsets are shown below, measured with double ended arrows.

adc-offset-positive.PNG

In the above figure, the first transition occurs at 0.5 LSB and the transition is from 1 to 2. But 1 to 2 transitions should occur at 1.5 LSB for perfect case. So the difference (Perfect – Real = 1.5 LSB – 0.5 LSB = +1 LSB) is the offset error. Similarly in the figure below (negative offset), the first transition occurs at 2 LSB and the transition is from 0 to 1. But the 0 to 1 transition should occur at 0.5 LSB for perfect case. So the difference (Perfect – Real = 0.5 LSB – 2 LSB = -1.5 LSB) is the offset error.

adc-offset-negative.PNG

It should be noted that offset errors limit the available range for the ADC. A large positive offset error causes the output value to saturate at maximum before the input voltage reaches maximum. A large negative offset error gives output value 0 for the smallest input voltages.

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