Configuration Bits, EEPROM, and ID Locations

Configuration Bits, EEPROM, and ID Locations can all be predefined in a source code header file. These can use the "if defined" option to make it unique for each compiler. The use of MPLAB® Code Configurator or MPLAB Harmony will actually help you create the configuration, but for direct coding, this can be a handy setup procedure.

 *         Configuration Bits, EEPROM, and ID locations
 *  Configuration bits can be automated:
 *      1) Window->PIC® Memory Views->Configuration Bits
 *      2) Select your desired settings
 *      3) Press the "generate source code to output"
 *      4) Cut/paste your selection here
 * Additionally, tools like MCC for 8- & 16-bit or MHC for 32 can be used to 
 * generate these configuration bits.

#if defined(__XC8__)

#pragma config FOSC = INTOSC    // Oscillator Selection (INTOSC oscillator: I/O function on CLKIN pin)
#pragma config WDTE = OFF       // Watchdog Timer Enable (WDT disabled)
#pragma config PWRTE = ON       // Power-up Timer Enable (PWRT enabled)
#pragma config MCLRE = OFF      // MCLR Pin Function Select (MCLR/VPP pin function is digital input)
#pragma config CP = OFF         // Flash Program Memory Code Protection (Program memory code protection is disabled)
#pragma config CPD = OFF        // Data Memory Code Protection (Data memory code protection is disabled)
#pragma config BOREN = ON       // Brown-out Reset Enable (Brown-out Reset enabled)
#pragma config CLKOUTEN = OFF   // Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin)
#pragma config IESO = ON        // Internal/External Switchover (Internal/External Switchover mode is enabled)
#pragma config FCMEN = ON       // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is enabled)

#pragma config WRT = OFF        // Flash Memory Self-Write Protection (Write protection off)
#pragma config VCAPEN = OFF     // Voltage Regulator Capacitor Enable (All VCAP pin functionality is disabled)
#pragma config PLLEN = ON       // PLL Enable (4x PLL enabled)
#pragma config STVREN = ON      // Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset)
#pragma config BORV = LO        // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), low trip point selected.)
#pragma config LVP = OFF        // Low-Voltage Programming Enable (High-voltage on MCLR/VPP must be used for programming)

#elif defined(__XC16__)

/* depends upon device, use IDE to generate */

#pragma config POSCMOD = NONE           // Primary Oscillator Select (Primary oscillator disabled)
#pragma config I2C1SEL = PRI            // I2C1 Pin Location Select (Use default SCL1/SDA1 pins)
#pragma config IOL1WAY = ON             // IOLOCK Protection (Once IOLOCK is set, cannot be changed)
#pragma config OSCIOFNC = OFF           // Primary Oscillator Output Function (OSC2/CLKO/RC15 functions as CLKO (FOSC/2))
#pragma config FCKSM = CSDCMD           // Clock Switching and Monitor (Clock switching and Fail-Safe Clock Monitor are disabled)
#pragma config FNOSC = FRCDIV           // Oscillator Select (Fast RC Oscillator with Postscaler (FRCDIV))
#pragma config SOSCSEL = SOSC           // Sec Oscillator Select (Default Secondary Oscillator (SOSC))
#pragma config WUTSEL = LEG             // Wake-up timer Select (Legacy Wake-up Timer)
#pragma config IESO = ON                // Internal External Switch Over Mode (IESO mode (Two-Speed Start-up) enabled)

#pragma config WDTPS = PS32768          // Watchdog Timer Postscaler (1:32,768)
#pragma config FWPSA = PR128            // WDT Prescaler (Prescaler ratio of 1:128)
#pragma config WINDIS = OFF             // Watchdog Timer Window (Windowed Watchdog Timer enabled; FWDTEN must be 1)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable (Watchdog Timer is disabled)
#pragma config ICS = PGx1               // Comm Channel Select (Emulator EMUC1/EMUD1 pins are shared with PGC1/PGD1)
#pragma config GWRP = OFF               // General Code Segment Write Protect (Writes to program memory are allowed)
#pragma config GCP = OFF                // General Code Segment Code Protect (Code protection is disabled)
#pragma config JTAGEN = OFF             // JTAG Port Enable (JTAG port is disabled)

#elif defined(__XC32__)

#if defined(__32MX795F512L)

#pragma config FPLLIDIV = DIV_12        // PLL Input Divider (12x Divider)
#pragma config FPLLMUL = MUL_24         // PLL Multiplier (24x Multiplier)
#pragma config FPLLODIV = DIV_256       // System PLL Output Clock Divider (PLL Divide by 256)

#pragma config FNOSC = FRCDIV           // Oscillator Selection Bits (Fast RC Osc w/Div-by-N (FRCDIV))
#pragma config FSOSCEN = OFF            // Secondary Oscillator Enable (Disabled)
#pragma config IESO = OFF               // Internal/External Switch Over (Disabled)
#pragma config POSCMOD = OFF            // Primary Oscillator Configuration (Primary osc disabled)
#pragma config OSCIOFNC = ON            // CLKO Output Signal Active on the OSCO Pin (Enabled)
#pragma config FPBDIV = DIV_8           // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/8)
#pragma config FCKSM = CSDCMD           // Clock Switching and Monitor Selection (Clock Switch Disable, FSCM Disabled)
#pragma config WDTPS = PS1048576        // Watchdog Timer Postscaler (1:1048576)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable (WDT Disabled (SWDTEN Bit Controls))

#pragma config DEBUG = OFF              // Background Debugger Enable (Debugger is disabled)
#pragma config ICESEL = ICS_PGx2        // ICE/ICD Comm Channel Select (ICE EMUC2/EMUD2 pins shared with PGC2/PGD2)
#pragma config PWP = OFF                // Program Flash Write Protect (Disable)
#pragma config BWP = OFF                // Boot Flash Write Protect bit (Protection Disabled)
#pragma config CP = OFF                 // Code Protect (Protection Disabled)
# error This example is written for a PIC32MX795F512L
#endif /* PIC32MX795F512L */
#endif /* XC32 */

EEPROM Defines

// Optionally, if the device has EEPROM, you can specify its initial value here:

#ifdef __XC8__
#ifdef _PIC18
__EEPROM_DATA(0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88);
#ifdef __CCI__
 __eeprom int foo[] = { 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88 };
eeprom int foo[]  = { 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88 };

#elif defined(__XC16__)

#ifdef __CCI__
// CCI enabled
int foo[] __eeprom = { 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88 };
char * bar __eeprom = "More space as necessary....";
int foo[] __attribute__((space(eedata))) = { 0x11, 0x22, 0x33, 0x44, 0x55, 0x66,
                                             0x77, 0x88 };
char *bar __attribute__((space(eedata))) = "More space as necessary....";

#elif defined(__XC32__)
//PIC32 MCUs do not have EEPROM at this time

ID Defines

// A good practice is to place a firmware version into the ID locations:

#define FIRMWARE_VERSION 0x1234

#if defined(__XC8__)
    ID Locations are dependent on the device and not all support writing more
    than 4 bits per location.

    The line below is for legacy use.

#pragam config IDLOC1 = 1, IDLOC2 = 2, IDLOC3= 3, IDLOC = 4;

#elif defined(__XC16__)
/* User ID locations are a product of the device, and vary from device to
   device.  I'm not sure all devices have UIDs. */

/* one way to protect yourself is to test for the presence of _FUIDn first */

#ifdef _FUID0
#ifdef _FUID1
#ifdef _FUID2
#ifdef _FUID3

/* PS, you can test for the presence of any SFR by doing the same thing */
#ifdef T1CON
/* this device has a timer 1 control register (and likely the whole timer) */

#elif defined(__XC32__)
/* For PIC32 MCUs, the USERID is a field among the config bits */
#pragma config USERID=0x1234
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