PIC16F1XXX Limitations

This device family does not require a header for debugging, but one is available. However, only the device has the following limitations:

  • General Debug Limitations.
  • General Programming Limitations.
  • You cannot view the stack even though you can access it.
  • You cannot single step through an interrupt. Due to hardware restrictions, the debugger or emulator cannot jump to the interrupt vector memory location in Single Step mode.
  • BF is cleared when SSPBUF is interrogated by software.
  • RCIF is cleared when RCREG is interrogated by software.
  • RBIF is cleared when PORT is interrogated by software, except when Freeze on Halt is enabled.
  • Timer0 freeze requires a header. The following devices require the use of the header to freeze Timer0: PIC16LF1823, PIC16LF1824, PIC16LF1826, PIC16LF1827, PIC16LF1828, PIC16LF1933, PIC16LF1934, PIC16LF1936, and PIC16LF1937.
  • The number of breakpoints may differ between the device and debug header. Refer to the Development Tools Selector (DTS) on Microchip's website to select your device and determine the number of available breakpoints for the device and its related Processor Extension Pak (PEP) or debug header.
  • Runtime Watch and Data Capture limitations: Enhanced Midrange devices have a silicon errata limitation which prevents Runtime Watch and Data Capture features from working up to the maximum Fosc frequency of 32 MHz. Work-around: For reliable Runtime Watch and Data Capture operation, we recommend keeping the maximum Fosc at or below 3 MHz during the debugging phase of product development (EM).
  • PWRTE cannot be enabled while in Debug mode. The following devices that will not debug if the PWRTE configuration bit is set to ON:
    • PIC16F/LF1939/8/9-ICE
    • PIC16F/LF1829/5
    • PIC16F/LF1459/8/5
    • PIC16F/LF1716/3
    • PIC12f/LF1572
    • PIC16F(LF)1847/1847-ICE
    • PIC16F1705/1709
    • PIC16F/LF1508/1509 - 1509-ICD
    • PIC16F1939-ME2
    • PIC16F1829-ME2
    • PIC16F/LF1526/7
    • PIC16F1782/PIC16F1783/PIC16LF1782/PIC16LF1783
    • PIC16F1782/3
    • PIC16(L)F1782/1783/1784/1786/1787/1787-ICE
    • PIC16F/LF1788/9
    • PIC16F1704/1708
    • PIC16(L)F1705/9
    • PIC16F1946/PIC16F1947/PIC16F1947-ICE/LF1946/LF1947
    • PIC16F/LF1519/8/7/6
    • PIC16F/LF1512/3
    • PIC16LF1904/1906/1907/1907-ICE

PIC16L(F)178x Devices Only

  • Brown-Out Reset (BOR) prevents programming in Low-Voltage Power (LVP) mode. To ensure successful programming of these parts when using LVP on previously unprogrammed and bulk erased devices, Vdd must be 2.85 V or greater (with respect to Vss), thus, avoiding a BOR which would interfere with programming.

PIC16F1619-ME2 (AC244066) Only

  • TMR0CS value determines TMR0 peripheral freeze selection. When TMR0CS = 1, TMR0 peripheral freeze will enable and disable per the “Timer0” checkbox under Project Properties>REAL ICE>Freeze Peripherals. When TMR0CS = 0, the “Timer0” peripheral freeze checkbox setting has no effect and the TMR0 peripheral will freeze following the “Peripheral Freeze Enable” setting.

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