PIC16F630/676 Limitations
Headers are required for debug when using these devices. See the “Processor Extension Pak and Debug Header Specification” for details. Header limitations are as follows:
- General Debug Limitations
- General Programming Limitations
- General Device-ME2/ICE/ICD Limitations
- You cannot single step through an interrupt. Due to hardware restrictions, the debugger/emulator cannot jump to the interrupt vector memory location in Single Step mode.
- ID memory cannot be erased at Vdd < 4.5 V. At Vdd < 4.5 V, the part cannot be bulk erased, so it has to be row erased. Row erase can be used on program memory, but not on configuration memory (where user ID resides).
- Program memory standard Flash. Program memory, not enhanced Flash. You cannot program in Low Voltage mode (Vdd < 4.5 V). See the device programming specification for more information.
- RBIF is cleared when PORT is interrogated by software, except when Freeze on Halt is enabled.
Freeze on Halt Limitations
- Timer0 will not freeze using the internal clock.
- CMOUTx pins do not freeze, status bits and interrupt flags do freeze.