DSP Engine

dsPIC® DSC Block Diagram

The following is a general block diagram of the various core and peripheral modules in the dsPIC® family of devices. In purple we can see the DSP engine.

DSCBlockDiagram.png

Digital Signal Processor (DSP) Engine

The DSP engine is a block of hardware that is fed with data from the W register array, but contains its own specialized result registers. The DSP engine consists of the following components:

  • High-speed 17-bit by 17-bit multiplier
  • Barrel shifter
  • 40-bit adder/subtractor
  • Two target accumulator registers
  • Rounding logic with selectable modes
  • Saturation logic with selectable modes
Elements.png

Data Paths

This is the data path through the accumulators, starting with single cycle accesses to from both X and Y data spaces

DataPaths.png

This data path bypasses the accumulators but uses the barrel shifter, extension and backfill logic

DataPaths2.png

  Return to Top

© 2024 Microchip Technology, Inc.
Notice: ARM and Cortex are the registered trademarks of ARM Limited in the EU and other countries.
Information contained on this site regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.