The dsPIC provides a 17-bit by 17-bit multiplier which executes all multiplication operations in one instruction cycle. On the dsPIC, this multiplier is shared between the DSP and MCU instructions. The 17-bit by 17-bit multiplier is capable of performing mixed-sign multiplication and can multiplex its output using a scaler to support either 1.31 fractional (Q31) or 32-bit integer results. Unsigned operands are zero-extended, while signed operands are sign-extended into the 17th bit of the multiplier input value. The results of the multiplication can be either a 32-bit fractional number in 1.31 format, or a 32-bit signed or unsigned integer. The output of the multiplier and scaler is fed into a sign-extension block, which produces a 40-bit sign-extended result.
Even though both inputs to the multiplier are 16-bit data, a 17-bit multiplier is used in order to correctly handle the fixed-point computation of (-1.0 * -1.0) or (0x8000 * 0x8000). Before the multiplication is performed, both 16-bit operands are sign-extended to 17-bits.
- The 17x17 Multiplier is part of ALL 16-Bit devices.
- dsPIC® DSC
- Part of DSP engine, feeds MAC
- Fed by X and Y data spaces
- PIC24
- Adapted from DSP engine
- Considered part of ALU
- Fed by W registers only
- Used for both MCU and DSP multiplication instructions
- Single cycle operation
- Performs 16x16 multiplication
- Operands can be
- 16-bit integer with 32-bit integer product
- 1.15 fractional with 1.31 fractional product
- Operands can be
- A 17x17 multiplier for 16-bit data?
- Simplifies signed-unsigned MCU multiplication
- Before multiplication is performed, sign is preserved in Bit 17
- Correctly performs (-1.0) * (-1.0) operation
- Simplifies signed-unsigned MCU multiplication
Signed Fractional Multiplies
- Signed Fractional Multiplying
- Multiplying two 16-bit signed fractional numbers (1.15 format) result in one 32-bit product with two sign bits (2.30 format)
- The two resulting sign bits will always be identical EXCEPT for the case -1 x -1
- Sign bits are preserved in bit 17 of the multiplier
- Multiplier restores bit 17 when done to account for this case
- Multiplier will shift result one to the left to align result back to 1.31 expected by the accumulators
- Zero is shifted into LSB