Overflow and Saturation

The dsPIC supports two optional saturation modes which affects the output of the 40-bit adder: 32-bit Saturation (referred to as Normal Saturation) and 40-bit Saturation (referred to as Super Saturation). Selecting the saturation mode is controlled by several bits in the CORCON register. The SATA bit enables or disables saturation for Accumulator A, and the SATB bit enables or disables saturation for Accumulator B. When saturation is enabled, the ACCSAT bit is then used to select the type of saturation - either Normal Saturation or Super Saturation. The same saturation mode will apply to both accumulators, if both SATA and SATB are 1. Lastly, there is a SATDW bit in the CORCON which enables Data Write Saturation. This feature allows for the “best possible” 16-bit value to be stored from the accumulator when the SAC instruction is used.

  • Overflow
    • Passively sets corresponding status bit indicating that overflow has occurred
  • Saturation
    • Actively limits maximum size of data and preserves sign bit
  • Saturation modes
    • Selected by CORCON
    • None (Default):
      • Calculation results will be allowed to destroy sign bit (bit 39), no trap set
    • Catastrophic:
      • Arithmetic trap when sign bit (bit 39) destroyed
    • Normal Saturation:
      • Bit 31 Overflow and Saturation
    • Super Saturation:
      • Bit 39 Overflow and Saturation

Saturation Control

CORCON: Core Control Register

U-0 U-0 U-0 R/W-0 R/W-0 R-0 R-0 R-0
US EDT DL2 DL1 DL0
bit 15 bit 8

R/W-0 R/W-0 R/W-1 R/W-0 R/C-0 R/W-0 R/W-0 R/W-0
SATA SATB SATDW ACCSAT IPL3 PSV RND IF
bit 7 bit 0
Legend
R = Readable Bit W = Writable Bit U = Unimplemented bit, read as '0'
u = Bit is unchanged x = bit is unknown -n/n = Value at POR and BOR/Value at all other resets
'1' = bit is set '0' = bit is cleared -n = Value at POR reset

bit 15-13

Unimplemented: Read as '0

bit 12

US: DSP Multiply Unsigned/Signed Control bit

bit 11

EDT: Early DO Loop Termination Control bit

bit 10-8

DL<2:0>: DO Loop Nesting Level Status bits

bit 7

SATA: AccA Saturation Enable bit

1 = Accumulator A saturation enabled
0 = Accumulator A saturation disabled

bit 6

SATB: AccB Saturation Enable bit

1 = Accumulator B saturation enabled
0 = Accumulator B saturation disabled

bit 5

SATDW: Data Space Write from DSP Engine Saturation Enable bit

1 = Data space write saturation enabled
0 = Data space write saturation disabled

bit 4

ACCSAT: Accumulator Saturation Mode Select bit

1 = 9.31 saturation (super saturation)
0 = 1.31 saturation (normal saturation)

bit 3

IPL3: CPU Interrupt Priority Level Status bit 3

bit 2

PSV: Program Space Visibility in Data Space Enable bit

bit 1

RND: Rounding Mode Select bit

bit 0

IF: Integer or Fractional Multiplier Mode Select bit

Saturation Disabled

When saturation is disabled, the output of the adder is never modified. In this mode, the adder provides the same dynamic range as with Super Saturation mode, namely -256.0 to approximately +256.0, but no clipping will occur when this range is exceeded. When an operation exceeds the allowed range, the lower 40 bits of the result will remain unchanged, even though they would be incorrect. This condition is called a “Catastrophic Overflow”, and the user has the option of having this generate a Math Error Trap. This selection is controlled by the Catastrophic Overflow Trap Enable bit, which resides in the INTCON1 register.

  • ACCxU contains magnitude data
  • Fixed-point range of (-256.0 - ~+255.0)
  • Results are never modified
  • If sign-bit (bit 39) is destroyed
    • Overflow bit for Corresponding accumulator is set
    • Trap will be generated if trap is enabled
  • Default
SatDisabled.png

Saturation Trap Control

INTCON1: Interrupt Control Register 1

R/W-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
NSTDIS OVATE OVBTE COVTE
bit 15 bit 8

U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0
MATHERR ADDRERR STKERR OSCFAIL
bit 7 bit 0
Legend
R = Readable Bit W = Writable Bit U = Unimplemented bit, read as '0'
u = Bit is unchanged x = bit is unknown -n/n = Value at POR and BOR/Value at all other resets
'1' = bit is set '0' = bit is cleared -n = Value at POR reset

bit 15

NSTDIS: Interrupt Nesting Disable bit

bit 14:11

Unused: Read as '0

bit 10

OVATE: Accumulator A Overflow Trap Enable bit

1 = Trap overflow of Accumulator A
0 = Trap disabled

bit 9

OVBTE: Accumulator B Overflow Trap Enable bit

1 = Trap overflow of Accumulator B
0 = Trap disabled

bit 8

COVTE: Catastrophic Overflow Trap Enable bit

1 = Trap on catastrophic overflow of Accumulator A or B enabled
0 = Trap disabled

bit 7:5

Unused: Read as '0

bit 4

MATHERR: Arithmetic Error Status bit

bit 3

ADDRERR: Address Error Trap Status bit

bit 2

STKERR: Stack Error Trap Status bit

bit 1

OSCFAIL: Oscillator Failure Trap Status bit

bit 0

Unimplemented: Read as '0

Normal Saturation (31-bit)

The Normal Saturation mode supports a 1.31 data format. The 1.31 data format uses just one magnitude bit (which is a sign bit) and 31 fractional bits to represent a value. When Normal Saturation is enabled, the output of the adder is limited to a range of 32 bits, and Accumulator Upper contains the sign-extension of the 32-bit value stored in Accumulator High and Accumulator Low. The sign of the 32-bit value, stored in Accumulator High bit 15, is extended to all bits in Accumulator Upper. This means that if an operation destroys the sign-bit stored in Accumulator bit 31, the Adder will saturate the result to either the largest 32-bit negative number or the largest 32-bit positive number.

  • Output of adder uses 32 bits only
  • Sign bit (ACCx<31>)extended into ACCxU
    • Resultant sign bit is preserved during subsequent operations
  • Overflow will never occur
    • Accumulator will saturate instead of overflow
  • Fractional mode result is sign extended 1.31

Largest positive value is 0x00 7FFF FFFF (0.999969482422)

NormalSaturation1.png

Largest negative value is 0xFF 8000 0000 (-1.000000000000)

NormalSaturation2.png

Super Saturation (39-bit)

When Super Saturation is enabled, the output of the Adder is limited to a range of 40 bits, and the Accumulator Upper register contains the upper 8-bits of magnitude information. This data format is referred to as 9.31, because it has 9 magnitude bits, which includes one sign bit, and 31 fractional bits. In Super Saturation mode, when an add operation destroys the sign-bit stored at Accumulator bit 39, the Adder will saturate the result to either the largest 40-bit negative number or the largest 40-bit positive number. The maximum negative Accumulator value is 0x8000000000 or -256.0 as a fixed-point value. The largest positive Accumulator value is 0x7FFFFFFFFF or approximately +256.0. The Super Saturation mode provides computational head room which may be very useful in algorithms, while simultaneously providing system protection from runaway calculations. The accumulator value can increase and decrease as long as the value is within the range of -256 and +256.

  • Largest positive value is 0x7F FFFF FFFF (+255. 999969482422)
  • Output of adder uses 40 bits
    • Overflow in this mode is detected by STATUS bits
    • Integer mode magnitude grows into ACCxU
  • Fractional mode magnitude grows but:
    • Implied radix point remains between bits ACCxH<31> and ACCxH<30>
    • 1.31 format is magnitude extended to 9.31
  • When sign bit 39 clobbered, saturation logic
    • Retains sign bit in bit 39
    • Fills all other bits in accumulator with maximum positive or negative value
SuperSaturation.png

Saturation Detection

SR: CPU STATUS Register

R-0 R-0 R/C-0 R/C-0 R-0 R/C-0 R-0 R/W-0
OA OB SA SB OAB SAB DA DC
bit 15 bit 8

R/W-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0
IPL2 IPL1 IPL0 RA N OV Z C
bit 7 bit 0

bit 15

OA: Accumulator A Overflow Status bit

1 = Accumulator A overflowed
0 = Accumulator A has not overflowed

bit 14

OB: Accumulator B Overflow Status bit

1 = Accumulator B overflowed
0 = Accumulator B has not overflowed

bit 13

SA: Accumulator A Saturation ‘Sticky’ Status bit

1 = Accumulator A is saturated or has been saturated at some time
0 = Accumulator A is not saturated

bit 12

SB: Accumulator B Saturation ‘Sticky’ Status bit

1 = Accumulator B is saturated or has been saturated at some time
0 = Accumulator A is not saturated

bit 11

OAB: OA or OB Combined Accumulator Overflow Status bit

1 = Accumulators A or B have overflowed
0 = Neither Accumulators A or B have overflowed

bit 10

SAB: SA or SB Combined Accumulator ‘Sticky’ Status bit

1 = Accumulators A or B are saturated or have been saturated at some time in the past
0 = Neither Accumulator A or B are saturated

bit 9

DA: DO Loop Active bit

bit 8

DC: MCU ALU Half Carry/Borrow bit

bit 7-5

IPL<2:0>: CPU Interrupt Priority Level Status bits

bit 4

RA: REPEAT Loop Active bit

bit 3

N: MCU ALU Negative bit

bit 2

OV: MCU ALU Overflow bit

bit 1

Z: MCU ALU Zero bit

bit 0

C: MCU ALU Carry/Borrow bit

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