The digital signal processor (DSP) Engine provides two data rounding modes: conventional (or biased) rounding and convergent (or unbiased) rounding. The rounding logic is only utilized during execution of the SAC.R instruction and also when an Accumulator Write-Back is performed. Conventional rounding is the typical rounding that most people think of, and values are rounded up whenever bit 15 of Accumulator Low is set. This rounding method is considered “biased” rounding, because over time, the effect of always rounding up when Accumulator Low equals 0x8000 slightly skews results to the high side.
A more statistically accurate method of rounding is convergent rounding, which removes the bias of conventional rounding. Unbiased rounding rounds up only if Accumulator Low is greater than 0x8000, or if Accumulator Low equals 0x8000 and bit 16 in the Accumulator High register is 1. As you can see, the only difference between the two modes is when Accumulator Low is 0x8000. With conventional rounding, the value will always be rounded up, but in convergent rounding, the value will only be rounded up statistically half of the time.
- Rounding has no effect on the source accumulator, only the destination register
- Two modes
- Conventional (biased)
- Slightly biased towards positive numbers
- Convergent (unbiased)
- Performs additional test of MSWORD bit 0
- This is the default mode
- Conventional (biased)
In most applications, the method of rounding will have little impact, yet both methods are provided. Even though convergent rounding is more accurate, conventional rounding is provided to support “bit accurate” algorithms which utilize traditional rounding. A final point to understand about rounding is that rounding only occurs while data is being stored back through the X Data Bus. This implies that when a value is rounded, it does not modify the value stored in the accumulator.
Rounding Control
CORCON: Core Control Register
| U-0 | U-0 | U-0 | R/W-0 | R/W-0 | R-0 | R-0 | R-0 |
| — | — | — | US | EDT | DL2 | DL1 | DL0 |
| bit 15 | bit 8 |
| R/W-0 | R/W-0 | R/W-1 | R/W-0 | R/C-0 | R/W-0 | R/W-0 | R/W-0 |
| SATA | SATB | SATDW | ACCSAT | IPL3 | PSV | RND | IF |
| bit 7 | bit 0 |
bit 15-13
Unimplemented: Read as '0
bit 12
US: DSP Multiply Unsigned/Signed Control bit
bit 11
EDT: Early DO Loop Termination Control bit
bit 10-8
DL<2:0>: DO Loop Nesting Level Status bits
bit 7
SATA: AccA Saturation Enable bit
bit 6
SATB: AccB Saturation Enable bit
bit 5
SATDW: Data Space Write from DSP Engine Saturation Enable bit
bit 4
ACCSAT: Accumulator Saturation Mode Select bit
bit 3
IPL3: CPU Interrupt Priority Level Status bit 3
bit 2
PSV: Program Space Visibility in Data Space Enable bit
bit 1
RND: Rounding Mode Select bit
1 = Biased (conventional) rounding enabled
0 = Unbiased (convergent) rounding enabled
bit 0
IF: Integer or Fractional Multiplier Mode Select bit
Rounding Types
Conventional rounding has a slight bias towards positive numbers because the range of numbers is not symmetric.
Convergent rounding, the default case, adds an additional test of MSWORD bit 0. When the LSWORD = 0x8000, then bit 0 of the MSWORD is tested. If it is =1 then the MSWORD is incremented when it is stored. If MSWORD<0=0> (i.e. MSWORD bit 0 = 0) then the result is NOT incremented.
