Why do some SST serial flash devices have two busy bits in their status register?

The busy bit can be monitored for the completion of a write operation in progress. Two busy bits were put in the status register to allow for compatibility with older/other flash devices. Either of the busy bits can be used and should behave the same.

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Refer to "Table 4-2: Status Register" of the "SST26VF032B / SST26VF032BA 2.5V/3.0V 32 Mbit Serial Quad I/O (SQI) Flash Memory" datasheet, which could be found in the "Documents" section of the SST26VF032B product page.

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