LAN8810/LAN8810i - 25 MHz Clock Oscillator Selection Considerations

Consider the frequency and stability/aging/tolerance (cumulative within ± 50 ppm) in the selection of the oscillator. You should also consider jitter. Verify that the 25 MHz oscillator in your design introduces no more than 200 pS of added jitter to the clock input. The low jitter requirement for the clock input is necessary in order to meet the stringent IEEE waveform jitter specification. Specifically, this is Cycle-to-Cycle jitter measured Peak-to-Peak.

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