Digit Recognition AI/ML Application on SAM E51 IGAT Curiosity Evaluation Kit using MPLAB Harmony v3: Step7

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Step 7.1: Configure Harmony Core Service

1

Select the Harmony Core Service in the Project Graph and configure the Harmony Core Service on Configuration Options.

harmony_core_service_config.png
Figure 1

Step 7.2: Configure NVMCTRL Peripheral Library (PLIB)

1

The NVMCTRL is added by default to the project graph. Select the NVMCTRL in the Project Graph and configure the NVMCTRL PLIB on the Configuration Options.

nvmctrl_config.png
Figure 2

Step 7.3: Configure Event System (EVSYS) PLIB

1

The EVSYS is added by default to the project graph. Launch the Event System Configuration window from the Project Graph tab, select Plugins > Event System Configuration.

open_event_sys_config.png
Figure 3

Once open, you will see the following window on your screen:

event_sys_config_window.png
Figure 4

2

Configure the EVSYS channel 0 on the Event System Manager window:

  • Set the DMA Controller Channel 0 (DMAC_CH_0) event as the event generator. The event is configured to appear asynchronously.
  • Set the CCL Look Up Table Input 0 (CCL_LUTIN_0) as the event user.
event_sys_config.png
Figure 5
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Note: Currently, the User Ready status will be in red at the event generator section in the Event System Manager window even event user is configured.

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Make sure that the status of the event and user (Event Status and User Ready) is green. If it is red, verify that the Event Output and Event Input are enabled in the respective PLIB configuration (DMAC and CCL for this application example).

3

In the Clock Easy View window, open the peripheral clock configuration by clicking on the Peripheral Clock Configuration button.

evsys_clock_config_1.png
Figure 6

Once the window is opened, scroll down to the EVSYS_0 peripheral and set GCLK3 (100 MHz) as the source clock to CCL peripheral.

evsys_clock_config_2.png
Figure 7

As per the electrical characteristics of EVSYS, provided in the SAM D5x/E5x Family datasheet, the EVSYS peripheral maximum running clock frequency is 100 MHz.

Step 7.4: Configure Input System Service

1

Under the left tab Resource Management (MCC), go to Device Resources and expand Input > Service.

Click on the green_plus.png symbol beside Input System Service to add the Input System Service to the project.
add_input_system_service.png
Figure 8

Once the Input System Service is added to the Project Graph, configure the Input System Service configuration on Configuration Options.

input_system_service_config.png
Figure 9

Step 7.5: Configure GPIO Pins for QSPI, 8-48 MHz Crystal Oscillator external input (OSCCTRL_XIN0), and LED

1

The QSPI pins will be configured as per the following QSPI design schematic on the SAM E51 IGAT Curiosity Evaluation Kit.

qspi_pin_design.png
Figure 10

In the Pin Settings window, scroll down to respective pin numbers and then configure the pins as shown in Figure 11.

qspi_pin_config.png
Figure 11

2

The 8-48 MHz Crystal Oscillator external input (OSCCTRL_XIN0) pin will be configured as per the following Target Clock design schematic on the SAM E51 IGAT Curiosity Evaluation Kit.

oscctrl_xin0_pin_design.png
Figure 12

In the Pin Settings window, scroll down to the respective pin number #31 (PA14) and then configure the pin as shown in Figure 13.

oscctrl_xin0_pin_config.png
Figure 13

3

The user LED will be configured as per the following USER_LED design schematic on the SAM E51 IGAT Curiosity Evaluation Kit.

led_design.png
Figure 14

In the Pin Settings window, scroll-down to pin number #63, and then configure this pin according to the list.

  • Set the Pin Number #63 as GPIO:
    • Pin ID = PB02
    • Custom Name = LED0
    • Function = GPIO
    • Direction = Out
    • Latch = High
user_led_config.png
Figure 15


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