Controling System Level Interrupt Parameters with Harmony

 Summary

When Harmony System Services has been configured into a project, the application will be able to control several system level interrupt parameters. This page provides information for using Harmony to control system level interrupts.


Setting up Interrupt System Services

To enable Interrupt System Services from MHC select the box "Use Interrupt System Service?" under
Harmony Framework Configuration ▶ System Services ▶ Interrupts

sys-int-setup.png

When the "Generate" button is pushed, MHC will add the source files to the project to enable Interrupt System Services.

Initializing the Interrupt System

Before the interrupt system service APIs can be called, the Interrupt System must be initialized. Initialization is perform by the function SYS_INT_Initialize.

  • MHC places a call to the interrupt initialization function from SYS-Iinitialize.

system-init.c

Enabling / Disabling Interrupts

  • Global interrupts are enabled and disabled using the System Services functions SYS_INT_Enable and SYS_INT_Disable.
  • MHC places a call to the interrupt enable function from SYS-Iinitialize.

system-init.c

void SYS_Initialize(void* data)
{

/* Initialize System Services */
SYS_INT_Initialize();

/* Initialize Middle ware */

/* Enable Global Interrupts */
SYS_INT_Enable();

}

Assigning Shadow Register Sets

Shadow registers are used to store the current contents of a processor's registers during interrupt processing. A shadow register set is assigned to an interrupt priority. When an interrupt whose priority has an assigned shadow register set occurs, the current values of the MCU registers are copied to the specified shadow registers. On a Return from Interrupt the MCU register values are restored from the shadow registers.

PIC32MZ devices contain seven shadow register sets. Most PIC32MX devices contain one set of shadow registers.

Shadow registers sets are assigned to interrupts through the function SYS_INT_ShadowRegisterAssign.


void SYS_INT_ShadowRegisterAssign( INT_PRIORITY_LEVEL priority,
INT_SHADOW_REGISTER shadowRegister )

Example:
SYS_INT_ShadowRegisterAssign (
INT_PRIORITY_LEVEL4, INT_SHADOW_REGISTER_1);

The definitions of INT_PRIORITY_LEVEL and INT_SHADOW_RESITER are contained in the following enumerations:

typedef enum {

INT_DISABLE_INTERRUPT = 0,
INT_PRIORITY_LEVEL1 = 1,
INT_PRIORITY_LEVEL2 = 2,
INT_PRIORITY_LEVEL3 = 3,
INT_PRIORITY_LEVEL4 = 4,
INT_PRIORITY_LEVEL5 = 5,
INT_PRIORITY_LEVEL6 = 6,
INT_PRIORITY_LEVEL7 = 7

} INT_PRIORITY_LEVEL;



typedef enum {
INT_SHADOW_REGISTER_0 = 0x00,
INT_SHADOW_REGISTER_1 = 0x01,
INT_SHADOW_REGISTER_2 = 0x02,
INT_SHADOW_REGISTER_3 = 0x03,
INT_SHADOW_REGISTER_4 = 0x04,
INT_SHADOW_REGISTER_5 = 0x05,
INT_SHADOW_REGISTER_6 = 0x06,
INT_SHADOW_REGISTER_7 = 0x07
} INT_SHADOW_REGISTER;

Assigning a Multi-vector or Single Vector interrupt scheme.

PIC32 interrupts can be configured to work in either multi-vector or single-vector mode. In multi-vector mode each interrupt source has it own vector address where control is passed upon an interrupt. In single vector mode all interrupts, regardless of the source, transfer control to a single address.

Single vector interrupt mode is used almost exclusively by Real Timer Operating Systems (RTOS). Almost all PIC32 applications not running an RTOS use multi-vector mode. After RESET the default is multi-vector interrupt mode.

If needed, the system developer can change the interrupt mode with:

PLIB_INT_SingleVectorSelect
PLIB_INT_MultiVectorSelect


 Learn More

 
Harmony Interrupt PLIB Tutorial
Learn more >
 
Entire Interrupt System Service Interface
Learn more >

20th Annual
Microchip MASTERs Conference 2016
Register now - Deadline: July 29

JW Marriott Desert Ridge Resort-Phoenix, AZ

© 2016 Microchip Technology, Inc.
Information contained on this site regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.