Live PhotoFrame Tutorial: Step 1

Step 1.1: Create an MPLAB® Harmony Project


Create a folder under the Harmony installation to place this lab. Navigate to
<Harmony-Installation-Path>/apps and create the folder structure, training/middleware.

Extract the ZIP file you downloaded to the training/middleware/ folder.


Navigate to <Harmony-Installation-Path>/apps/training/middleware and create the folder structure, dev/live_photoframe. The lab will be developed in the dev/live_photoframe folder. MPLAB® X IDE will create the live_photoframe_lab sub-folder inside dev/live_photoframe.


Start MPLAB X IDE and create a new project by selecting File > New Project.


In the Categories pane of the new project dialog, select Microchip Embedded.


In the Projects pane, select 32-bit MPLAB Harmony Project and then click Next.



Specify the following in the New Project dialog:
• Harmony Path: <Harmony Install Path>
• Project Location: <Harmony Install Path>/

• Enter Project Name: live_photoframe_lab
• Configuration Name: pic32mz_ef_sk_meb2 (this is optional)
• Target Device : PIC32MZ2048EFH144 (this will be automatically selected, if the Target Board is selected below)
• Target Board: PIC32MZ (EF) Starter Kit plus MEBII



After clicking the Finish button, the project will be created and opened. You will see the MPLAB Harmony Configurator (MHC) window along with the integrated Harmony Help file.

If you close the MHC window, you can re-open it by clicking on Tools > Embedded > MPLAB Harmony Configurator.

Step 1.2: Select the Board Support Package (BSP)


Click on the Options tab in the MPLAB® Harmony Configurator main window to select and configure the Harmony Framework in a graphical tree-based format.


Expand the BSP Configuration tree and then select PIC32MZ EF Starter Kit w\ Multimedia Expansion Board (MEB) II.


If a BSP exists for your development board, you will want to use it. Choosing a BSP lets MHC know about the hardware you will use for the project.

In the previous step, if you had selected Target Board during project creation, then the BSP would be automatically selected in MHC.

By selecting a BSP, MHC can automatically control the following settings for you:

  • PIC32 core configuration (watchdog timer, debugger channel)
  • PIC32 oscillator configuration (including external clock/crystal)
  • PIC32 I/O Port pin connections to LEDs and switches

In addition to configuring hardware options for you, the BSP comes with a small group of library functions that allow you to easily interface with LEDs and switches. In this lab, you will observe the selections that BSP makes for you. This will show you how to make these selections manually in case a BSP does not exist for the board you want to use.

Step 1.3: Verify Configuration Bits are Correct


In the central window, under the MPLAB Harmony Configurator tab, click on the Options tab to view the MPLAB Harmony & Application Configuration tree selections.


Expand the Device & Project Configuration tree, then expand the PIC32MZ2048EFH144 Device Configuration.

The BSP you selected has properly configured these selections for you. This step shows you how to make changes to these selections if needed.

  • DEVCFG3 and DEVCFG2 – No change
  • DEVCFG1 – No change, but verify that the Watchdog Timer Enable (FWDTEN) is OFF
  • DEVCFG0 – No change

In case you are wondering where these names come from, they correspond to the PIC32 core configuration registers and bit names. Please see the device datasheet for details.


Before moving to the next step, you may want to collapse the Device & Project Configuration tree.

Step 1.4: Verify Oscillator Settings

Select the Clock Diagram tab to display the Clock Configurator window.


Verify the following clock parameters:

  • POSCMOD set to EC
  • FNOSC set to SPLL
  • FPLLIDIV set to DIV_3
  • FPLLMULT set to MUL_50
  • FPLLODIV set to DIV_2

Experiment with other clock settings. Did you notice how some selections produce red values? These indicate a bad clock configuration. If you hover over them, you will see an explanation in the pop-up window.

The PIC32 is connected to a 24 MHz external clock input. We are not using the internal PIC32 oscillator for this project.

When you change the configured clocks from the default values on the graphical interface, they are reflected as a shaded field in the Options Configuration Bits. Since the BSP selected the default values, there should be no shading. To illustrate this, notice that when the FPLL DIV is changed to a Divide By 1 (DIV_1) instead of 3 in the Clock Diagram graphical interface, the Options tab will reflect the changes in DEVCFG1 with shading.
You can configure the clocks using the tree selections but it is much easier to do so graphically.


The BSP has already configured the PLL using the selections for the "PIC32MZ EF Starter Kit with Multimedia Expansion Board II." For custom boards without a BSP, you can use the PLL’s Auto-Calculate feature to determine and set the PLL to multiply and divide values (FPLLIDIV, FPLLMULT and FPLLODIV). You can see how this works by going back to the Clock Configurator window (Clock Diagram tab).

Select Auto-Calculate to see the pop-up window enabling you to set the desired system frequency. Note that the BSP has already configured this to 200 MHz. Keep this setting.


Step 1.5: Use the Graphical Pin Manager to Verify I/O Pins


Open the Graphical Pin Manager by clicking on the Pin Diagram tab.



Verify that the BSP has properly configured the PIC32 pins based on the external devices connected to them. You will be using the LCD Display, LEDs and Switches. Select the Pin Table tab in the MHC output pane:


If this window is minimized, it can be found on the bottom left of MPLAB X IDE. Click on it to maximize it.

You can choose to view only the pins that are part of the Board Support Package by isolating this section. Refer to the screenshot below.


The following screenshot shows all of the pins configured by the BSP:


To see the pin configuration settings, click on MHC's Pin Settings tab.


LCD Pin Configuration:


LED Pin Configuration:


Next Step >

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