Modes Of Operation

The PIC32MZ Central Processing Unit (CPU) runs at one of 3 privilege levels: User, Kernel and Debug. These modes determine the addresses, registers and instructions that are available to a program.

Kernel Mode

The core enters Kernel mode at reset and when an exception is recognized. While in Kernel mode, the software has access to the entire 4 GB virtual address space, as well as the CP0 registers.

User Mode

User mode access is restricted to the first 2 GB of the address space (0x00000000 through 0x7FFFFFFF), and can be excluded from accessing CP0 functions. Accessing a virtual address above 0x7FFFFFFF in User mode will cause an exception.

Kernel/User modes are designed to support the needs of operating systems, allowing a system designer to partition code between privileged and unprivileged software.

Although it can sound as if Kernel mode is for OS-based applications and User mode is the simple everyday mode, the reverse is the truth. Most PIC32MZ applications will start out in, and never leave Kernel mode.

Debug Mode

Debug mode is entered on a debug exception. While in Debug mode, the software has access to all Kernel mode addresses and functions, as well as debug segment dseg, which overlays part of the kernel segment KSEG3.

Figure 50-13 (from the PIC32MZ CPU Reference Manual shows the different memory maps for each mode:


kuseg, kseg0, kseg1, kseg2, kseg3:

The MIPS32 virtual address space is partitioned into five, traditional, fixed-size segments:

kuseg (2GB):

  • addresses are cacheable, and accessible in both user-mode and kernel-mode; is designed to be used by user-mode programs

kseg0 (512MB):

  • addresses are cacheable, and accessible in kernel-mode only; is designed to be used by kernel-mode programs

kseg1 (512MB):

  • addresses are noncacheable, and accessible in kernel-mode only; is designed to be used by kernel-mode programs
  • designed for access to peripheral devices and for code that requires noncacheable access, including initialization code

kseg2/3 (1GB total):

  • addresses are cacheable, and accessible in kernel-mode only; is designed to be used by kernel-mode programs

Note that the segment boundaries are fixed and never change.

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