The Pulse Width Modulation (PWM) module is designed for applications that require:
- High-resolution at high PWM frequencies
- The ability to drive Standard, Edge-Aligned,
- Center-aligned Complementary mode and Push-Pull mode outputs
- The ability to create multiphase PWM outputs
The High-Speed PWM module can operate in either the standard edge-aligned or center-aligned time base.
To create the edge-aligned PWM, a timer or counter circuit counts upward from zero to a specified maximum value, called the ‘period’. Another register contains the duty cycle value, which is constantly compared with the timer (period) value. When the timer or counter value is less than or equal to the duty cycle value, the PWM output signal is asserted. When the timer value exceeds the duty cycle value, the PWM signal is deasserted. When the timer is greater than or equal to the period value, the timer resets itself, and the process repeats. The figure below shows the standard edge-aligned PWM mode waveforms.
Dead Time Insertion: Edge Aligned PWM Mode
Each complementary output pair for the High-Speed PWM module has a 12-bit down counter to produce the dead time insertion. Each dead time unit has a rising and falling edge detector connected to the duty cycle comparison output. Depending on whether the edge is rising or falling, one of the transitions on the complementary outputs is delayed until the associated dead time timer generates the specific delay period.
The dead time logic monitors the rising and falling edges of the PWM signals. The dead time counters reset when the associated PWM signal is inactive and starts counting when the PWM signal is active. Any selected signal source that provides the PWM output signal is processed by the dead time logic.
There are three Dead Time Control modes in edge-aligned PWM mode:
- Positive Dead Time: The Positive Dead Time mode describes a period of time when both the PWMxH and PWMxL outputs are not asserted. This mode is useful when the application designer needs to allocate time to disable some power transistors prior to enabling other transistors. This is similar to a “Break before Make” switch. When Positive Dead Time mode is specified, the DTRx registers specify the dead time for the PWMxH output, and the ALTDTRx register specifies the dead time for the PWMxL output.
- Negative Dead Time: The Negative Dead Time mode describes a period of time when both the PWMxH and PWMxL outputs are asserted. This mode is useful in current feed topologies that need to provide a path for current to flow when the power transistors are switching. This is similar to a “Make Before Break” switch. When Negative Dead Time mode is specified, the DTRx register specifies the negative dead time for the PWMxL output, and the ALTDTRx register specifies the negative dead time for the PWMxH output.
- Dead Time Disabled: The dead time logic can be disabled per PWM generator.
The figure below shows the PWM waveforms of Positive, Negative, and No Dead Time.
- Edge-Aligned PWM Mode Selection:
For Center-Aligned mode in the dsPIC33, the duty cycle, period phase and dead-time resolutions will be 8.32 ns. Two common, medium power converter topologies are push-pull and half-bridge. These designs require the PWM output signal to be switched between alternate pins, as provided by the Push-Pull PWM mode. Phase-shifted PWM describes the situation where each PWM generator provides outputs, but the phase relationship between the generator outputs is specifiable and changeable.
The center-aligned PWM waveforms align the PWM signals to a reference point, such that half of the PWM signal occurs before the reference point and the remaining half of the signal occurs after the reference point. Center-Aligned mode is enabled when the Center-Aligned Mode (CAM) enable bit in the PWMx Control register (PWMCONx<2>) is set.
Below is an example of the center-aligned PWM mode used in an uninterruptible power supply (UPS) application.
- Duty cycle, dead time, phase shift and frequency resolution is 8.32 ns in Center-Aligned PWM mode.
- Center-Aligned mode ignores the Least Significant 3 bits of the Duty Cycle, Phase-Shift and Dead-Time registers. The highest CAM resolution available is 8.32 ns with the clock prescaler set to the fastest clock.
- PWMCONx (PWMx Control Register) enables and disables the center-aligned mode. CAM (Center-aligned mode enable bit)
- CAM: Center-Aligned Mode Enable bit
- 1 = Center-Aligned mode is enabled
- 0 = Edge-Aligned mode is enabled
- The Independent Time Base mode (ITB = 1) must be enabled to use Center-Aligned mode. If ITB = 0, the CAM bit is ignored.
When operating in Center-Aligned mode, the effective PWM period is twice the value that is specified in the PWMx Primary Phase-Shift registers (PHASEx) because the Independent Time Base counter in the PWM generator is counting up and then counting down during the cycle. The up and down count sequence doubles the effective PWM cycle period. This mode is used in many motor control and uninterrupted power supply applications (UPS). The configuration of the center-aligned PWM mode selection is shown below.
While using the center-aligned mode and complementary PWM, only the ALTDTRx register should be used for dead time insertion. The dead time is inserted in the PWM waveform as shown in the figure below.
- Center-Aligned PWM Mode Selection: