PID Basics: dsPIC® DSC Implementation Part 2

dsPIC® Digital Signal Controllers (DSCs) Implementation Operations

The first operation is to set the two pointers to point at the first location of each buffer in the RAM. W8 in the following diagram is the pointer to the coefficients buffer; W10 is the pointer to the error buffer.

PID-operation-1.png

The new error value is computed as the difference between the reference voltage (Vref) and the new output voltage read by the Analog-to-Digital Converter (ADC) (ADCBUF1). See the figure below.

PID-operation-2.png

movsac Instruction

The movsac instruction performs a number of different tasks. The following diagram and steps demonstrate the movsac instruction.

PID-operation-3.png

1

Move the RAM contents.

1a: Moves the content of the RAM location pointed by W8 into register W4.
1b: Moves the content of the RAM location pointed by W10 into register W5.

PID-operation-4-new.png

2

Update the Working registers.

2a: Updates the W8 register so that it is now pointing to the following RAM location.
2b: Updates the W10 register so that it is now pointing to the following RAM location.

PID-operation-5-new.png
PID-operation-6.png

Proportional-Integral-Derivative (PID) Term Computation

Below are the computation steps of the first term of the PID.

1

The W4 and W5 registers' content is multiplied and the result is added to the 40-bit accumulator B.

PID-operation-7.png

2

Moves the content of the RAM location pointed by W8 into register W4.

3

Moves the content of the RAM location pointed by W10 into register W5.

PID-operation-8-new.png

4

Updates the W8 register so that it is now pointing to the following RAM location.

5

Updates the W10 register so that it is now pointing to the following RAM location.

PID-operation-9-new.png

6

The W4 and W5 registers' content are multiplied and the result is added to the 40-bit accumulator B.

PID-operation-10-new.png

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