Sequencing is needed when more voltages are generated by the same dsPIC® to supply different areas/chips on the same board. It is required that these voltages ramp from zero to the nominal supply voltage (and vice versa at switch off) in the correct order and with predefined ramp duration.
Sequencing can be implemented digitally. The diagram below represents the sequential sequencing operation. For each output voltage, the corresponding Vref is driven by the firmware in order to follow the desired ramp profile. The correct amount of delay at the beginning impacts any sequencing pattern.
The diagrams here present different types of patterns that are normally used. Other (application-specific) patterns are easily implemented since the user has the complete control of all timing.