SOC Overview

The RN1723 is based on an integrated, low-power 32-bit System On a Chip (SOC). Figure 1 depicts the key internal functional blocks:

rn17xx-blk-diagram.png
Figure 1: RN1723 SOC Internal Block Diagram

Key Features

  • Federal Communications Commission (FCC)/European Telecommunications Standards Institute's (ETSI) Certified and Wi-Fi® Alliance 802.11 b/g/n compliant 2.4 GHz IEEE 802.11 b/g Transceiver
  • Ultra-low power consumption (4 µA sleep)
  • Integrated 32-bit CPU with embedded TCP/IP Stack
    • TCP, UDP, WPS, DNS, DHCP, FTP, HTTP, Configuration Web Server, etc.
  • Universal Asynchronous Receiver Transmitter (UART)/ Serial Peripheral Interface (SPI) interfaces
  • 10 GPIO Pins
  • Eight Analog Sensor Inputs
  • Hardware encryption engine for Wi-Fi security usage
  • Battery boost regulator

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