The PTGTRIG Step Command causes the Peripheral Trigger Generator (PTG) to generate one of the 32 trigger signals (PTGO0 - PTG3O1). These signals are used as control inputs to other MCU peripherals synchronizing activity. PTG trigger signals can be configured in one of the two modes:
- In Toggle mode, the current value of the trigger signal will be toggled when PTGTRIG is executed.
- In Pulse mode, PTGTRIG will trigger a one-time pulse on PTGOx. Here, the width of the pulse is set by the application program.
Selecting the Trigger Mode
The mode of the Trigger signal is determined by the Toggle Output Mode bit in the PTG Control and Status Register (PTGCST<12>).
PTGCST: PTG Status and Control Register
| R/W-0 | U-0 | R/W-0 | R/W-0 | U-0 | R/W-0 | R/W-0 | R/W-0 |
| PTGEN | — | PTGSIDL | PTGTOGL | — | PTGSWT | PTGSSEN | PTGVIS |
| bit 15 | bit 8 |
| R/W-0 | R/W0 | U-0 | U-0 | U-0 | U-0 | R/W-0 | R/W-0 |
| PTGSTRT | PTGWDT0 | — | — | — | — | PTGITM1 | PTGITM0 |
| bit 7 | bit 0 |
bit 12
PTGTOGL: TRIG Output Toggle Mode bit
1 = Toggle the state of PTGOx on each PTGTRIG command
0 = Generate a single pulse on PTGOx on each PTGTRIG command
Determining the Pulse Width of the Trigger
When Trigger Pulse mode is selected, the width of the pulse is determined by a field in the PTG Control Register (PTGCON<7:4>).
PTGCON: PTG Control Register
| R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
| PTGCLK2 | PTGCLK1 | PTGCLK0 | PTGDIV4 | PTGDIV3 | PTGDIV2 | PTGDIV1 | PTGDIV0 |
| bit 15 | bit 8 |
| R/W-0 | R/W0 | R/W0 | R/W0 | U-0 | R/W-0 | R/W-0 | R/W-0 |
| PTGPWD3 | PTGPWD2 | PTGPWD1 | PTGWDT0 | — | PTGWDT2 | PTGWDT1 | PTGWDT0 |
| bit 7 | bit 0 |
bit 7 - 4
PTGPWD<3:0>: PTG Trigger Output Pulse Width bits
1111 = All triggers are 16 PTG clock cycles
1110 = All triggers are 15 PTG clock cycles
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0001 = All triggers are 2 PTG clock cycles
0000 = All triggers are 1 PTG clock cycles