SAM L10 Boot ROM

Boot ROM Description

Boot ROM Block Diagram

saml10-boot-rom_SAM_L10_Boot_ROM_block_diagram.png

The Boot ROM ensures the integrity of the device at boot. It features a Boot Interactive mode, which allows you to perform several actions on the device, such as Non-Volatile Memory (NVM) integrity checking and Chip Erase via a debugger connection. Unless a debugger is connected and places the Boot ROM in Boot Interactive mode, the CPU will jump to the Flash memory, loading the Program Counter (PC) and Stack Pointer (SP) values, and will start fetching Flash user code.

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Note: Before jumping to the Flash, the Boot ROM resets the first two 2 kB of SRAM. The clocks remain unchanged.

Boot ROM Features

  • Command interface for the host debugger supporting:
    • Chip Erase commands to provide secure transitions between the different Debug Access Levels (DAL)
    • Device integrity check of the NVM regions
    • Debugger read access of the NVM rows
  • CPU Park mode to get access for a debugger to the resources of the device depending on the DAL
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NOTE: A dedicated section is available for the SAM L11 Secure Boot overview, please refer to the link available at the bottom of this page.

SAM L10 Boot ROM Flow

The SAM L10 Boot ROM checks firstly if a debugger is present to enter the Boot Interactive mode, which allows you to perform specific tasks via a debugger connection. Before jumping to the application, the Boot ROM can also enter in a specific mode called CPU Park to allow the debugger to get access to the resources of the device depending on the DAL.

saml10-boot-rom_SAM_L10_Boot_ROM_Flow.png

Boot Interactive Mode

This mode allows the user to interact with the device during the Boot ROM execution via a debugger connection. This interactive mode reports execution status on entry and supports specific debugger commands:

  • Enter Interactive Mode (CMD_INIT)
  • Exit Interactive Mode (CMD_EXIT)
  • System Reset Request (CMD_RESET)
  • Chip Erase (CMD_CHIPERASE)
  • NVM Region Integrity Check (CMD_CRC)

Unless a debugger is connected and places the Boot ROM in Boot Interactive mode, the CPU will jump to the Flash memory, loading the Program Counter (PC) and Stack Pointer (SP) values, and will start fetching Flash user code. Note that before jumping to the Flash, the Boot ROM resets the first two 2 kB of SRAM. The clocks remain unchanged.

Chip Erase Management

saml10-boot-rom_SAM_L10_Chip_Erase_Mngmnt.png

CPU Park Mode

CPU Park mode allows the debugger to get full access to the resources of the device depending on its DAL. Communication with the CPU Park mode should be handled by the programming/debugging tool.

Boot Time

The Boot Time to reach user code for SAM L10 is 1.33 ms.

Related Sections

 
Debug Access Level
Learn more >
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References:

SAM L10 L11 family page

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