PWM Timer Selection

On many newer devices, the designer has several timers to choose from for the PWM peripheral. Timer2/4/6 are a typical set of choices. The PWM Peripheral makes use of one of the 8-bit Timer2/4/6 timer resources to specify the PWM period. The timer selection is controlled by the CxTSEL<1:0> bits in the CCPTMRS register. For a device with four PWM modules, the CCPTMRS register would look like the selections below:

CCPTMRS: PWM Timer Selection Control Register

R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
C4TSEL1 C4TSEL0 C3TSEL1 C3TSEL0 C2TSEL1 C2TSEL0 C1TSEL1 C1TSEL0
bit 7 bit 0

bit 7-6

C4TSEL<1:0>: CCP4 Timer Selection bits

00 = CCP4 is based off Timer 2 in PWM mode
01 = CCP4 is based off Timer 4 in PWM mode
10 = CCP4 is based off Timer 6 in PWM mode
11 = Reserved

bit 5-4

C3TSEL<1:0>: CCP3 Timer Selection bits

00 = CCP3 is based off Timer 2 in PWM mode
01 = CCP3 is based off Timer 4 in PWM mode
10 = CCP3 is based off Timer 6 in PWM mode
11 = Reserved

bit 3-2

C2TSEL<1:0>: CCP2 Timer Selection bits

00 = CCP2 is based off Timer 2 in PWM mode
01 = CCP2 is based off Timer 4 in PWM mode
10 = CCP2 is based off Timer 6 in PWM mode
11 = Reserved

bit 1-0

C1TSEL<1:0>: CCP1 Timer Selection bits

00 = CCP1 is based off Timer 2 in PWM mode
01 = CCP1 is based off Timer 4 in PWM mode
10 = CCP1 is based off Timer 6 in PWM mode
11 = Reserved

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