ADC Differential Non-linearity

Analog-to-Digital Converter (ADC) Differential Non-Linearity (DNL) is defined as the maximum and minimum difference in the step width between the actual transfer function and the perfect transfer function. Non-linearity produces quantization steps with varying widths, some narrower and some wider.

Positive and Negative DNL

For the case of the ideal ADC, the step width should be 1 Least Significant Bit (LSB). The step widths of a non-ideal (actual) ADC with DNL are not exactly 1 LSB. In the figure below, in a maximum case, the width of the step with output value 101 is 1.5 LSB which should ideally be 1 LSB. The DNL, in this case, would be +0.5 LSB. Whereas in a minimum case, the width of the step with output value 001 is only 0.5 LSB which is 0.5 LSB less than the expected width. So, the DNL now would be ±0.5 LSB.


ADC Missing Code

There are some special cases wherein the actual transfer function of the ADC would look as shown in the figure below (3-bit ADC). The first code transition (from 000 to 001) is caused by an input change of 250 mV. This is exactly as it should be. The second transition, from 001 to 010, has an input change that is 1.25 LSB which is increased by 0.25 LSB. The input change for the third transition is exactly the right size. The digital output remains constant when the input voltage changes from 1000 mV to 1500 mV and code 100 can never appear at the output: it is missing. The higher the resolution of the ADC, the less the severity of the missing code. An ADC with DNL error less than ±1 LSB guarantees no missing code.

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