UPD301C Plug-In Module (EV71C90A)
 
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UPD301C Plug-In Module (PIM)

1 Overview

1.1 Introduction

The UPD301C Plug-In Module (PIM) is a low-cost development tool for evaluating Microchip’s UPD301C Standalone Programmable USB Power Delivery (PD) Controller. This RoHS-compliant module is designed to work with the USB Power Delivery Software Framework (PSF) Evaluation Kit (EV65D44A).

Powered by Microchip's versatile ​USB PSF, this module provides a quick and easy way of evaluating and developing custom USB PD source, sink, and dual role applications for the UPD301B/C USB PD controllers.

The PIM interfaces with the EV65D44A development platform and replaces the onboard SAMD20 as the MCU target for running the PSF PD stack. It also serves as a BOM reduction option for the final design by packaging the MCU and UPD350 transceiver in a single package.

This PIM extends the flexibility of the EV65D44A platform to all the UPD301B/C use cases and reduces the overall time-to-market for a range of consumer and industrial applications by providing full control of the software to the end-user. Some of the target application areas are:

  • Point-of-Sale Terminals
  • Charging Lockers
  • IoT Products and Sensors
  • Smart Speakers and Monitors
  • Conference Systems
  • Power Tools
  • Multi-port Charging Docks
  • Automotive Rear Seat Charging Ports

The system block diagram of the UPD301C PIM is illustrated in Figure 1.

Figure-1.png
Figure 1: UPD301C PIM System Block Diagram

1.2 Kit Contents

This kit includes:

  • One UPD301C PIM
​

​UPD301C PIM Product Page

1.3 Acronyms and Definitions

Acronym Definition
USB PD USB Power Delivery
PSF USB Power Delivery Software Framework
EVB Evaluation Board
PIM Plug-In Module
MCU Microcontroller Unit
GPIO General Purpose Input Output
DRP Dual Role Power
FRS Fast Role Swap
UFP Upstream Facing Port
DFP Downstream Facing Port
PPS Programmable Power Supply
PM-PD Microchip’s DC-DC converter module for PD solutions (Power Module for Power Delivery)
Trace Custom Debug mode over UART. Can be used for data logging
Dead Battery PD Sink/DRP mode use case in battery powered applications where the UFP needs to derive power from VBUS for PD negotiation

1.4 Reference Documents

2 Getting Started

The UPD301C PIM comes pre-programmed with the two-port DRP demo UPD301C_PIM_DRP in PSF. Port 1 of this demo is configured as a DRP port with a notebook type port policy (i.e. high voltage sink and 5V source) while Port 2 is a DRP port with dock type port policy (i.e. 5V, 0A sink, and high voltage source).

The steps to evaluate the pre-programmed UPD301C PIM out of the box on the USB PSF Evaluation Kit (EV65D44A) are as follows:

Figure-2.png
Figure 2: Setting up EV65D44A for the UPD301C PIM

1

Ensure that switch SW2 of the EV65D44A is in the OFF position as shown in Figure 2.

2

Install the PM-PD modules on J35 and J44 as illustrated in Figure 2.

​

Ensure that the power is turned OFF before installing or removing the PM-PD module. Hot plugging or removal of the module can damage it permanently.

3

Remove all the jumpers around the SAMD20 and Port 1 UPD350 of the EV65D44A as shown in Figure 2.

4

Ensure that J15 has jumpers populated in the SNK/DRP position.

5

Connect ports 1 and 2 using a full-featured USB Type-CTM cable as shown in Figure 2.

6

Connect a 24V power supply to power the EV65D44A as shown in Figure 2. The power supply should be capable of providing at least 6A (for 60W operation).

Figure-3.png
Figure 3: Installing the UPD301C PIM on EV65D44A

7

Align the UPD301C PIM over the SAMD20 and Port 1 UPD350 headers and insert the module as shown in Figure 3. Please ensure that the pins are aligned correctly and that the arrow marking on the PIM matches the marking on the EV65D44A.

​

Please verify the orientation of the PM-PD module before proceeding to the next step. Misalignment of the PM-PD pins with the socket will result in permanent damage to the PM-PD.

8

Set SW2 of the EV65D44A to the ON position.

9

When powered ON, the pre-programmed demo in the UPD301C PIM will execute. Port 1 (notebook type DRP port) will resolve itself in a high voltage sink role while Port 2 (dock type DRP port) will resolve itself in a high voltage source role. Both the ports would successfully negotiate a 20V, 3A contract as seen in Figure 4.

Figure-4.png
Figure 4: Power ON operation and VBUS LED indication
​

For evaluating other PD use cases using UPD301C PIM, please refer to the section Microchip's USB Power Delivery Software Framework (PSF).

3 Hardware User Guide

3.1 Connectors and Interfaces

Figure-5.png
Figure 5: UPD301C PIM Connectors and Interfaces (Top Side)
Reference Designator Component Type Label Description
J1 2x10 Header (2.54 mm) GPIO_SEL1 Breakout for interfacing UPD301C GPIOs with EV65D44A signals. Refer the section Breakout Options
J2 2x10 Header (2.54 mm) GPIO_SEL2 Breakout for interfacing UPD301C GPIOs with EV65D44A signals. Refer the section Breakout Options
J3, J5, J6, J11 1x10 Header (2.54 mm) N/A Interface headers for the SAMD20 slot of EV65D44A
J4, J7, J8, J10 1x8 Header (2.54 mm) N/A Interface headers for the Port 1 UPD350 slot of EV65D44A
J9 1x3 Header (2.54 mm) VDD_SEL Jumper option for selecting VDD33 source for PIM. Refer to the section Power Supply Options
Reference Designator Component Type Label Description
TP1 Red Test Loop 3V3_PIM 3.3V input from EV65D44A for the PIM
TP2 Black Test Loop GND Ground
Figure-6.png
Figure 6: UPD301C PIM Connectors and Interfaces (Bottom Side)

3.2 Breakout Options

Figure-7.png
Figure 7: GPIO_SEL1 (J1) Breakout Details
Connector UPD301C Pin Name Pin Number EV65D44A signal name Jumper Populated Description
J1 (GPIO_SEL1) PA00 1 2 RESET_N0_OUT Y RESET_N0_OUT is used to control the reset lines of the UPD350s. Assigned to PA00 of UPD301C by default
PA01 3 4 SPI_SS1 Y SPI_SS1 is used to control the SPI chip select of the Port 2 UPD350. Assigned to PA01 of UPD301C by default
PA02 5 6 VSEL2_EN_20V_P1 Y VSEL2_EN_20V_P1 is used to enable 20V output of the Port 1 GPIO mode PM-PD module. Assigned to PA02 of UPD301C by default
PA03 7 8 DC_DC_ALERT1 Y DC_DC_ALERT1 is the IRQ line of the Port 2 I2C mode PM-PD module. Assigned to PA03 of UPD301C by default
PA04 9 10 DC_DC_ALERT0 Y DC_DC_ALERT0 is the IRQ line of the Port 1 I2C mode PM-PD module. Assigned to PA04 of UPD301C by default
PA05 11 12 VSEL1_EN_15V_P1 Y VSEL1_EN_15V_P1 is used to enable 15V output of the Port 1 GPIO mode PM-PD module. Assigned to PA05 UPD301C by default
GPIO2 13 14 ORIENTATION_N_P1 Y ORIENTATION_N_P1 is used to control the Port 1 super speed MUX direction as well as the Port 1 Orientation status LED. Assigned to GPIO2 of UPD301C by default
GPIO3 15 16 EN_VBUS_P1 Y EN_VBUS_P1 is used to control the source mode load switch of Port 1 PM-PD module. Assigned to GPIO3 of UPD301C by default
GPIO8 17 18 DC_DC_EN_P1/EN_SINK_P1 Y DC_DC_EN_P1 is used to enable the Port 1 PM-PD module when in Source mode. EN_SINK_P1 is used to enable the Sink mode load switch of Port 1 when in sink or DRP mode. Assigned to GPIO08 of UPD301C by default
PA27/GPIO9 19 20 FAULT_IN_N_P1 Y FAULT_IN_N_P1 is the fault notification from Port 1 PM-PD module. Assigned to PA27/GPIO09 of UPD301C by default
Figure-8.png
Figure 8: GPIO_SEL2 (J2) Breakout Details
Connector EV65D44A signal name Pin Number UPD301C Pin Name Jumper Populated Description
J2 (GPIO_SEL2) VSEL0_EN_9V_P1 1 2 PA23/GPIO7 Y VSEL0_EN_9V_P1 is used to enable the 9V output of the Port 1 GPIO mode PM-PD module. Assigned to PA23/GPIO7 of UPD301C by default
I2C_MASTER_SCL 3 4 PA23/GPIO7 Y I2C_MASTER_SCL is the clock line of the UPD301C I2C Master interface. Used to control PM-PD modules. Assigned to PA23/GPIO7 of UPD301C by default
I2C_MASTER_SDA 5 6 PA22/GPIO6 Y I2C_MASTER_SDA is the data line of the UPD301C I2C Master interface. Used to control PM-PD modules. Assigned to PA22/GPIO6 of UPD301C by default
TRACE_RX 7 8 PA19/GPIO5 Y TRACE_RX is the receive line of the UPD301C UART debug interface. Assigned to PA19/GPIO5 of UPD301C by default
TRACE_TX 9 10 PA18/GPO4 Y TRACE_TX is the transmit line of the UPD301C UART debug interface. Assigned to PA18/GPO4 of UPD301C by default
I2C_SLAVE_SCL 11 12 PA17 Y I2C_SLAVE_SCL is the clock line of the UPD301C I2C Slave interface. Assigned to PA17 of UPD301C by default
I2C_SLAVE_SDA 13 14 PA16 Y I2C_SLAVE_SDA is the data line of the UPD301C I2C Slave interface. Assigned to PA16 of UPD301C by default
SPI_IRQ_N1 15 16 PA15 Y SPI_IRQ_N1 is the SPI interrupt line for Port 2 UPD350. Assigned to PA15 of UPD301C by default
VBUS_DIS_P1 17 18 PA28 Y VBUS_DIS_P1 teletype text is used to control the VBUS discharge FET of Port 1. Assigned to PA28 of UPD301C by default
I2C_SLAVE_IRQ 19 20 PA06 Y I2C_SLAVE_IRQ is the IRQ line for the UPD301C I2C slave interface. Assigned to PA06 of UPD301C by default

3.2 Power Supply Options

Figure-9.png
Figure 9: VDD_SEL (J9) Power Supply Option Details
Connector Pin Number Pin name Description
J9 (VDD_SEL) 1 3V3_DB 3.3V supply from EV65D44A in Bus-Powered mode
2 3V3_PIM 3.3V input to the UPD301C PIM
3 3V3_BRD 3.3V supply from EV65D44A in Self-Powered mode

4 Microchip's USB PSF

Microchip's USB PSF is a lightweight, full-featured USB PD 3.0 compliant software PD stack. The stack provides demos for various USB PD use cases which serve as a software starting point for your custom PD application.

PSF currently offers the following demos for the UPD301C PIM:

PSF Demo Name Description
​UPD301C_PIM_Source_Lite Two-port PD source-only application example for UPD301C that uses GPIO mode DC-DC control
​UPD301C_PIM_Source_Pro Two-port PD source application example for UPD301C that uses I2C mode DC-DC control. Supports advanced PD features like PPS, PD Power Balancing, and Power Throttling
​UPD301C_PIM_Sink PD sink application example for UPD301C. Supports multiple sink PDO selection algorithms
​UPD301C_PIM_DRP Two-port PD dual role application example for UPD301C. Port 1 demonstrates notebook/laptop type port policy and Port 2 demonstrates dock type port policy
​UPD301C_PIM_FRS Two-port PD dual role application example for UPD301C with Fast Role Swap (FRS) support. Port 1 demonstrates sink to source FRS and Port 2 demonstrates source to sink FRS

All the software stack-related documentation and the source code can be accessed through the PSF GitHub repository linked below.

​

Download USB PSF.

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