PIC16F648A Family Limitations

PIC16F648A, PIC16F628A, PIC16F627A

Headers are required for debugging when using these devices. See the “Processor Extension Pak and Debug Header Specification” for details. Header limitations are as follows:

  • General Debug Limitations
  • General Programming Limitations
  • General Device-ME2/ICE/ICD Limitations
  • You cannot single step through an interrupt. Due to hardware restrictions, the debugger or emulator cannot jump to the interrupt vector memory location in Single Step mode.
  • Program memory standard Flash. Program memory, not enhanced Flash. You cannot program in Low Voltage mode (Vdd < 4.5 V). See device programming specification for more information.
  • RCIF is cleared when RCREG is interrogated by software, except when Freeze on Halt is enabled.
  • RBIF is cleared when PORT is interrogated by software.
  • When driving a clock oscillator of more than 4 MHz into OSC1 in HS Oscillator mode, the device will not go into Debug mode, therefore, crystal caps will be required. The 32 kHz to 4 MHz range does not have this issue.
  • Above 16 MHz, in External Clock input (EC) mode, a Reset executes the first few instructions instead of only one instruction. The workaround is to add three NOPs at the reset vector.

Freeze on Halt Limitations

This device family requires a header for debugging. Header limitations are as follows:

  • Timer0 will not freeze using the internal clock.
  • Timer0 will not freeze using the external clock.
  • CMOUTx pins do not freeze, status bits and interrupt flags do freeze.

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