DSP Features of the Microchip dsPIC® DSC
Abstract
This class covers the DSP specific features of the dsPIC® Digital Signal Controller architecture in detail. These features include the DSP engine, DSP instructions, zero overhead loop features, dual memory access, modulo and bit-reversed addressing, MAC architecture, barrel shifter and multipliers. The exercises combine both C and assembly language programming in a series of signal acquisition and processing applications that reinforce the concepts introduced in the lecture.
Table of Contents
Part 1 - dsPIC® DSC Architecture Review
Part 2 - Introducing the DSP Engine
Part 3 - DSP Accumulator Operations
- DSP Accumulators
- Zero Backfill and Sign Extension
- 40-bit DSP Adder
- Overflow and Saturation
- Storage
- Accumulator Write-Back
- Data Write Saturation
- Rounding
- Lab Exercise 1: DSP Accumulator Operations
Part 4 - Multiplier and MAC Instructions
- 16-Bit Core 17x17 Multiplier
- Multiplication Instructions
- DSP MAC Overview
- DSP MAC Instructions
- Operand Pre-fetch
- Addressing Modes
- Lab Exercise 2: DSP Multiplier Operations
Part 5 - Additional DSP Features