Chapter 6 - MPLAB® Mindi™ Analog Simulator - COT Regulators with Internal Ripple Injection

This chapter presents some fundamental characteristics of Constant On Time (COT) Step-Down converters and their advantages.

6.1 Prerequisites

6.2 COT Buck Converter Experiments

The goal of the following studies is to demonstrate the characteristics and benefits of the COT architecture and to help you optimally design your power supply application.

As an example of a COT Buck Converter with internal ripple injection, MIC23155 simulations will be elaborated in the following case studies.

6.3 Case Study: Switching Frequency Dependence upon Input Voltage and Load

6.3.1 Switching Frequency dependence over VIN

The COT architecture does not have an oscillator to control the switching frequency; however, the unique architecture maintains the frequency fairly constant with input voltage variation.


Open the '(MIC23155) Buck example, startup' application schematic from Power Management > Switching Regulators > MIC23155.


Double-click the power supply and set the Final Voltage to 2.8 V



Run the simulation, select the 'Simplis_tran SW' graph, and stack the curves.


From the Measure menu, select 'Frequency'.


The switching frequency should be about 2.15 MHz. To see the PWM signals, zoom in the SW/V area by drawing a small rectangle.



Edit the input power supply again and set the Final Voltage to 5.5 V.


Repeat the same steps and measure the switching frequency. It should be about 2.68 MHz.


6.3.2 Switching Frequency dependence over Load

In order to achieve good load regulation, the Constant On Time converter must adapt its switching frequency according to loading. Thus, heavier loading translates into a higher frequency (limited to about 4 MHz).
Inductance selection also plays an important role in the resulting switching frequency. A low inductance (0.47 µH) produces higher peak inductor current that leads to lower switching frequency. A high inductance (2.2 µH) produces lower peak inductor current that leads to higher switching frequency.


To simulate the switching frequency variation load dependency:


Open the '(MIC23155) Buck example, AC transient load step' application schematic from Power Management > Switching > MIC23155.


Double click on the ILOAD symbol and configure a slow load ramp, according to the picture on the next page.



Run the simulation, select the 'simplis_tran SW' graph, and stack all curves.


Add a new probe using the 'More Probe Functions' menu and select 'Frequency' from the 'Per Cycle Voltage Measurement' group.


Close the pop-up message, select the 'SW'
node for frequency measurement.


The curve generated shows the frequency correlation with the load current and inductor current. As the inductor current increases, so does the switching frequency.


6.4 Case Study: Switching Pattern in Various Modes of Operation

6.4.1 No Load and Light Load Operation

The diode-emulation operation of the NMOS allows the control loop to work in discontinuous mode for light load operations. In discontinuous mode, the MIC23155 works in HyperLight Load to regulate the output. As the output current increases, the off time decreases thus provides more energy to the output. This switching scheme improves the efficiency of MIC23155 during light load currents by only switching when it is needed.

To simulate the switching pattern at HLL vs. CCM (Continuous Conduction Mode):


Open the '(MIC23155) Buck example, AC transient load step' application schematic from Power Management > Switching Regulators > MIC23155.


Double-click 'RLOAD' and reduce current to 0.05 A (to ensure HLL operation).



Plot the 'SW' on the 'OUTPUT' graph, on a separate grid.



Run the simulation and select the 'simplis_tran VOUT'


Two operating regions appear distinctive: at low loading (50 mA) being in DCM (Discontinuous Conduction Mode) the switching frequency is greatly reduced (bringing improved efficiency).


With higher output ripple; at higher loading (300 mA), the device enters CCM and the output ripple is minimized.


6.4.2 HLL to CCM transition. Choosing the right inductance value

As can be seen above, HLL operation has the benefit of increased efficiency with the cost of higher output ripple and a frequency highly dependent on loading. On the other hand, in CCM the device benefits from reduced output ripple and pseudo-fixed frequency. Thus, you might want to personalize these trade-offs, to push for higher efficiency or force the device to CCM at lighter loads. This can be adjusted by selecting the appropriate inductance value by using the following formula:


To simulate with different inductance values:


Open the '(MIC23155) Buck example, AC transient load step' application schematic from Power Management > Switching Regulators > MIC23155.


Reduce the RLOAD current to 0.05 A (typically meaning HLL operation).



Double click the inductor and increase the inductance to 2.2 μH.



Plot the 'SW' on the 'OUTPUT' graph, on a separate grid.


Run the simulation and select 'simplis_tran VOUT' waveforms.


Although the load toggles between 50 mA and 300 mA, the increased inductance now keeps the device in CCM even at 50 mA. Zooming in on the load step between 300 mA and 50 mA gives the waveforms below.



The MIC23155 switches with pseudo-constant frequency at 300 mA and 50 mA. When stepping to a lighter load, the device pauses switching until the output capacitor discharges to an undervoltage that retriggers switching.

6.5 Case Study: Load Transient Response

6.5.1 COT advantages

The COT architecture relies on a fast comparator to detect a drop in the output voltage, and as soon as the output voltage falls below the regulation threshold, a new ON-time pulse is generated for correcting the voltage deviation.

The response time to a load transient is therefore much faster when compared to other control methods. For example, a fixed-frequency method might have to wait up to a full clock cycle before applying the corrective action, in the form of a longer duty cycle. The concept is shown in the figure below.


To simulate the operation in load transient:


Open the '(MIC23155) Buck example, AC transient load step' application schematic from Power Management > Switching Regulators > MIC23155.



Set the current source, ILOAD, to a pulse of 500 mA.


Set the RLOAD resistor to {1.8/0.25}. This makes the load transient more evident.



Run the simulation, and view the transient results, simplis_tranX VOUT(Y1).



Go back to the Schematic window and select the Interactive Voltage Probe, then click on the 'SW' and 'FB' nets to add the waveforms.



Go to the Waveform Viewer window, then click in the Menu Axes > New Grid to add another grid to the window. Then select the U1-FB (Y1) waveform, in the menu click Curves > Move Selected Curves to move it to the newly created grid. Zoom on the grids to focus on the region where the load transient takes place (around 20 μs). You should see a region similar to this one below:



Please note that all valleys of the U1-FB(Y1) waveform are neatly aligned to the 620 mV value. This is indeed the threshold of the comparator that triggers the ON-time pulse.


We will see soon that all the rising edges of the U1-SW(Y1) waveform are indeed aligned to the threshold crossing of the FB waveform, with a small delay due to the comparator and internal driver stages.


On the Waveform Viewer window, click in the menu, then Cursors > Toggle On/Off to turn on the cursors. Then drag them in correspondence to the valleys of the U1-FB(Y1) waveform just before the load transient. Note the period value (around 371 ns) and that the U1-SW(Y1) waveform goes high each time the U1-FB(Y1) waveform hits the regulation threshold (620 mV). By moving the A cursor to the falling edge of the SW waveform following the REF cursors, you’ll be able to measure also the SW ON-time which is around 210 ns.



Now move the REF cursor on the SW rising edge at 20.77 us, so just after the load transient, and move the A cursor to the subsequent SW rising edge. You’ll see that the switching period is smaller, measuring around 317.6 ns. It is noticeably shorter than the previously measured switching period.


Again, measure the ON-time of the switching cycle under consideration. It is still very close to 210 ns. So there has been no change in the ON-time, and the period change is entirely due to the reduction of the OFF time.


This example shows the mechanism of the COT to correct load transient voltage deviations. A new ON-time is immediately triggered as soon as the FB voltage drops below the regulation threshold. There is virtually no delay in the corrective action, except very small internal delays (due to comparator and driver stages). Also, please note that the ON-time pulse is NOT modulated. During the load transient, the ON-time stays constant—with very good approximation—as long as the input voltage is constant and the output voltage deviation is small. To increase the inductor current to the new level demanded by the load, the OFF-time is shortened.

Therefore, COT control exhibits some frequency variation during the load transient. Here, we’re seeing some instantaneous increase in the pulse FREQUENCY, while a fixed-frequency control method would react to the load transient with an increase of the pulse WIDTH. However, before the new wider pulse can be applied, the fixed-frequency control has to wait for the next clock cycle. There is no such a limitation in COT control.

COT control might have OTHER types of limitations. For example, the OFF-time can only be reduced to a minimum value, but not completely eliminated. This is also the case for MIC23155, and the reason for that is, the current sensing is done on the synchronous (aka low-side) switch. To read the current signal across the RDS(ON) of the low side switch, it must be turned ON at every switching cycle for some minimum amount of time after the high-side switch has been turned OFF. Therefore the duty cycle cannot go to 100%. As stated in the MIC23155 datasheet, the maximum achievable duty cycle is 80%.

This type of behavior (saturation of the duty cycle) can be observed in simulation by exacerbating the load transient even further (e.g. by increasing the pulsed level of the ILOAD current source up to 1 A).

6.5.2 Tweaking the loop gain and transient response using the feed-forward capacitor (CFF)

As can be seen in the previous studies, the simulation also includes an AC analysis, whose results are displayed in this Waveform Viewer tab:


The Bode plot shows a gain margin of approximately 68° and a cross-over frequency around 428 kHz.


Modify the original circuit by adding a small capacitor (10 pF) in parallel to the top feedback resistor R1. To improve convergence time, add an initial condition, which is equal to the difference between the output voltage VOUT (approximately 1.83 V) and the feedback voltage FB (approximately 0.62 V) at the beginning of the simulation, thus 1.83 V-0.62 V=1.21 V.



Run the simulation again and look at the new AC analysis results. We can note that the crossover frequency has been increased (now around 631 kHz) while the phase margin has slightly diminished (now around 62°), but it is still quite healthy.


If we look at the transient response, we can note several points:
First, the output voltage deviation during the load transient has significantly improved. Without C4, the voltage deviation (measured using cursors) is around 22.3 mV. With C4, the voltage deviation is only around 15.3 mV.
Second, the regulation target value of VOUT has slightly decreased (by around 10 mV).


By adding C4, we created an AC path that couples the VOUT voltage directly to the feedback node. This way, the transfer of AC perturbations on the VOUT to the FB node is enhanced, and a faster reaction to load transient is to be expected. This is quite intuitive.

However, explaining the decrease in the target regulation voltage is not so easy. To better understand this change, we look at the FB node waveforms. It can be observed that the valleys of the FB ripple waveform are in both cases regulated to 0.62 V. But the peak-to-peak ripple with C4 in place is lower than without C4. Thus, the average value of the FB ripple waveform is lower when C4 is there.

This also explains the small deviation observed between the actual VOUT average value and the theoretical output voltage value, calculated by using the resistor divider ratio R1/R2 and the nominal FB Regulation Voltage (0.62 V in the datasheet):


By reducing the peak-to-peak ripple of the FB waveform we get closer to the nominal target output voltage.


The triangular wave-shape of the FB ripple is created by a suitable internal ripple injection network, shown in RED in the figure below. For proper operation, the control (FB) ripple has to be in phase with the inductor current. The ripple on the VOUT waveform cannot satisfy this constraint if very low ESR output capacitors are used.

The impedance of the internal ripple injection network is very high, which requires that the feedback resistor divider be high impedance. C4 must also be comparable to the internal impedances (pF range). Otherwise, the internal ripple injection becomes ineffective.


Finally, see what happens if C4 is increased too much (220 pF). The “out-of-phase” ripple of the VOUT waveform is strongly coupled to the FB node, while the internally injected “in-phase” ripple is completely overwhelmed. The MIC23155 becomes unstable.


6.6 Case Study: Programming Soft-Start

To see how adjustable soft-start can improve the inrush current at turn-on:


Open the '(MIC23155) Buck example, startup' application schematic from Power Management > Switching Regulators > MIC23155.


Change the value of the output capacitor C2 to 47 μF.


Change the value of the load resistor RLOAD to {1.8/0.25}


Run the simulation and view the results.


In the Waveform Viewer, select the VOUT waveform, then Measure > Rise Time.


Then select the IVIN waveform on the 'VIN' tab and 'Maximum'.


Here we can observe that the maximum of the Input supply current is very high, then it stabilizes to a significantly lower value. The maximum is in correspondence of the onset of the VOUT ramp, where the slope across the output capacitor is maximum. We also measure the maximum current through the output capacitor:


Allowing for such a large inrush current is not a good design practice, because large inrush currents over-stress the application, especially if it is frequently exercised through ON/OFF cycles. Also, if associated with lower input voltages and/or source impedances, large inrush current may cause false startups.

Luckily enough, we can easily solve the problem since the MIC23155 has provision for adjustment of the soft-start time.
Going back to the schematic:


Select 'C3' and change its value to 1.5 nF.


Run the simulation to see the result.

On the Waveform Viewer, we can see the results of both simulations. For more clarity, only the waveforms of interest for measurements are retained. Notice that the VOUT rate of rise has slowed down significantly.


Also the maximum values of the input supply current and of the output capacitor current have significantly diminished.


6.7 References



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